The MP RGPV has published a tender for "RGPV/RUSA/2020/EC/03" on the 18 Sep 2020. This tender belongs to Image processing software category. This tender is published in Bhopal, Madhya Pradesh location. The vendors interested in this tender and related Image processing software tenders can obtain further details by registering in the Tendersniper web portal. Upon registration, Tendersniper sends regular tender alerts by email specifically addressing the user requirements (i.e., keywords, location and value range). Government business is a growing area of opportunity. The businesses are encouraged to actively monitor tender opportunities and participate in them to grow their business.
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Tender Title | RGPV/RUSA/2020/EC/03 |
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Tender Description | high definition real time image processing package (fpga development kit 1 multi-touch lcd module 2 hdmi-tx 2 hdmi-rx 2 8 mega pixel digital camera package 2 pciex4 cabling adapter & cable 2)fpga development kit specifications: 228,000 logic elements (les), 17,133 total memory kbits,1,288 18x18-bit multipliers blocks,2 pci express hard ip blocks,744 user i/os,8 phase locked loops (plls) fpga configuration maxii cpld epm2210 system controller and fast passive, parallel (fpp) configuration, on-board usb blaster for use with the programmer, programmable pll timing chip configured via max ii cpld, supports jtag mode memory devices 64mb flash with a 16-bit data bus, 2mb ssram (512k x 32), ddr3 so-dimm socket, up to 8gb capacity maximum memory clock rate at 533mhz, theoretical bandwidth up to 68gbps,buttons, switches and leds, 4 user-controllable leds, 4 buttons for user-defined inputs, 4 slide switches for user-defined inputs on-board clocks 50mhz oscillator, sma connectors. sma connecto |
Comments | high definition real time image processing package (fpga development kit 1 multi-touch lcd module 2 hdmi-tx 2 hdmi-rx 2 8 mega pixel digital camera package 2 pciex4 cabling adapter & cable 2)fpga development kit specifications: 228,000 logic elements (les), 17,133 total memory kbits,1,288 18x18-bit multipliers blocks,2 pci express hard ip blocks,744 user i/os,8 phase locked loops (plls) fpga configuration maxii cpld epm2210 system controller and fast passive, parallel (fpp) configuration, on-board usb blaster for use with the programmer, programmable pll timing chip configured via max ii cpld, supports jtag mode memory devices 64mb flash with a 16-bit data bus, 2mb ssram (512k x 32), ddr3 so-dimm socket, up to 8gb capacity maximum memory clock rate at 533mhz, theoretical bandwidth up to 68gbps,buttons, switches and leds, 4 user-controllable leds, 4 buttons for user-defined inputs, 4 slide switches for user-defined inputs on-board clocks 50mhz oscillator, sma connectors. sma connecto |
Published Date | |
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Due Date | 06 Oct 2020 00:00:00 |
Estimated Value | 64.5 Lakh |
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EMD | 0 INR |
Processing Fee | 0 INR |