SUPPLY AND COMMISSIONING OF CAD LAB - 8490437


The Sonbhadra Rajkiya Engineering College has published a tender for "SUPPLY AND COMMISSIONING OF CAD LAB" on the 20 Nov 2018. This tender belongs to CAD Software category. This tender is published in Sonbhadra, Uttar Pradesh location. The vendors interested in this tender and related CAD Software tenders can obtain further details by registering in the Tendersniper web portal. Upon registration, Tendersniper sends regular tender alerts by email specifically addressing the user requirements (i.e., keywords, location and value range). Government business is a growing area of opportunity. The businesses are encouraged to actively monitor tender opportunities and participate in them to grow their business.

Related alert: software Tenders | cad software Tenders | all type of engineering simulation software Tenders
Related categories: Aviation Ground Support Software Tenders | CAD Software Tenders | Msc marc software Tenders |

Tendersniper allows filtering tenders based on state, district, value, sector and some more. We offer to provide an online demo of the tendersniper features.


CAD Software tender analytics
Did you know
  • A total of 2 tenders were published for "cad software" in the Uttar Pradesh State during October 2018 - November 2018.
  • During the time period (June 2018 - October 2018), a total of 4 CAD Software tenders were published in University sector.
  • To get access to University tender   Register
     Tender Details

    Details: advancecmoslayoutdesign &simulationtool(microwindlatestversion)specificationadvance cmos layout design & simulation tool software must be perpetual in nature. library based schematic editor with facility to createsymbols. library of various digital models like gates, registers,devices, etc. both conventional pattern-based logic simulation andintuitive on-screen mouse-driven simulation. supports hierarchical logic design with built-in extractorwhich generates a spice netlist from the schematicdiagram (compatible with pspice and winspice). generation of verilog description of the schematic forlayout generation. mos level schematic support. fault analysis tool at the gate level of digital circuits.faults: stuck-1, stuck-at-0. immediate access to symbol properties of models likedelay, fanout. models and assembly support for 8051 and pic 16f84with facility to simulate with external circuits. sub-micron, deep-submicron, nanoscale technologysupport. facility to list delays of path

    Sector: University

    Published Date20 Nov 2018
    Tender Estimate Value15.0 Lakh
    Due Date Login to view Due Date
    Earnest Money Deposit(EMD)INR XXXX
    Processing Fee 0
    Document Sale Start Date XX-XX-XXXX
    Document Sale End DateXX-XX-XXXX
    Tender Opening DateXX-XX-XXXX
    Tender Document Link Login to view the document
    Tender Type Open Tender
    Tender Category Goods
    Register to search tenders

    Related Links

    University of Agricultural Sciences Tenders

    MSIHMCTRS Tenders

    WBUTTEPA Tenders

    Jadavpur University Tenders

    BU BHOPAL Tenders

    Activate Account
    Register to receive email notifications